AWS Fargate customers can now configure Amazon Elastic Container Service (ECS) tasks and Amazon Elastic Kubernetes Service (EKS) pods to use up to 16 vCPUs, an approximately 4x increase from before. vCPUs are the primary compute resource in ECS tasks and EKS pods. Larger vCPUs enable compute-heavy applications like machine learning inference, scientific modeling, and distributed analytics to more easily run on Fargate. In addition, customers can now provision up to 120 GiB of memory on Fargate, also a 4x increase from before. This helps batch workloads, extract, transform, load (ETL) jobs, genomics, and media processing applications better perform memory-intensive operations on Fargate. Larger vCPU and memory options may also make migration to serverless container compute simpler for applications that need more compute resources and cannot be easily re-architected into smaller microservices.

Amazon Relational Database Service (Amazon RDS) for MariaDB now supports MariaDB minor versions 10.5.17, 10.4.26 and 10.3.36. We recommend that you upgrade to the latest minor versions to fix known security vulnerabilities in prior versions of MariaDB, and to benefit from the numerous bug fixes, performance improvements, and new functionality added by the MariaDB community.

AWS Batch has increased the job report retention period from 24 hours to 7 days. This means that you can now query the details for AWS Batch jobs that were completed up to 7 days ago. With this longer retention period, you no longer need to worry about jobs disappearing after a day. You can query jobs a few days after submitting them, and have greater visibility over the jobs that you submitted throughout the week.

Amazon Elastic Container Service (Amazon ECS) has improved Amazon ECS Capacity Providers to deliver a faster Cluster Auto Scaling experience for scale-in events. Amazon ECS now scales-in excess capacity at a much faster rate, which helps you improve utilization of your infrastructure and saves compute costs.

63 years ago the US Postmaster-General, Arthur Summerfield, suggested that mail would be delivered in mere hours from one country to another country via missile. “We are on the threshold of rocket mail,” said Summerfield. He was right in one respect – there was a rocket mail delivery in 1959 but it was the only …

The post Rocket Mail appeared first on Electronics Weekly .

There’s the chip industry being in denial, the rise of TSMC, repair work on Nasa’s Artemis 1, a contrary view of electric vehicles and testing a hydroelectric turbine prototype in the Thames…

The post Most Read articles – Nasa repairs, EV white elephant, Hydroelectric turbine appeared first on Electronics Weekly .

Does anyone out there know of a source of proper (not too expensive) F8-16M (8 – 16 x 5mm) ball thrust bearings? By ‘proper’, I mean that both end ‘washers’ have ball grooves in, and the washers are not identical: one washer’s central hole fits the shaft snugly, while its outer diameter is slack in …

The post Thrust bearing help please appeared first on Electronics Weekly .

The European Space Agency has awarded Rocket Factory Augsburg (RFA) a contract worth €11.72m as part of the agency’s Boost! commercial space transportation services programme. The German startup is developing a three-stage RFA One orbital launch vehicle – designed to operate at a high cadence – and ESA says it will be partnering with it …

The post RFA One gets Boost! for commercial space transportation appeared first on Electronics Weekly .

Farnell had record-setting fiscal year revenue of $1.8 billion. The strong performance, with full year revenue increasing 20.2% year-over-year, was the result of notable increases in demand from the electronics, energy, security and transportation sectors. Farnell reported Q4 revenues of $442 million and an operating income margin of 14.2%, which was an increase of 597 basis …

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ARM’s Neoverse V2 core, Demeter, has been optimised for customer server workloads including the BERT ML framework. The flow of the BF16 instruction was tuned to boost performance and the instruction cache for the core is doubled to 2Mbits. Arm has also increased the vector performance of the core with four lanes of 128bit wide …

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