Today, Toshiba starts sampling a 64-layer 3D NAND memory. The Chip has 3-bit-per-cell technology and has a 256Gbit (32GB) capacity. next on the development roadmap is a 512Gbit (64GB) device, also with 64 layers. The new device succeeds the 48-layer BiCS FLASH, and delivers a 40% larger capacity per unit chip size than 48-layer stacking …